Applied digital logic exercises using FPGAs / Kurt Wick.Material type: TextSeries: IOP (Series). Release 3. | IOP concise physicsPublisher: San Rafael [California] (40 Oak Drive, San Rafael, CA, 94903, USA) : Morgan & Claypool Publishers, Distributor: Bristol [England] (Temple Circus, Temple Way, Bristol BS1 6HG, UK) : IOP Publishing, Description: 1 online resource (various pagings) : illustrations (some color)Content type: text Media type: electronic Carrier type: online resourceISBN: 9781681746609; 9781681746623Other title: Applied digital logic exercises using field-programmable gate arraysSubject(s): Logic design | Field programmable gate arrays | Programmable array logic | Mathematical physics | SCIENCE / Physics / Mathematical & ComputationalAdditional physical formats: Print version:: No titleDDC classification: 621.39/5 LOC classification: TK7868.L6 | W533 2017ebOnline resources: Click here to access online Also available in print.
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|Ebooks||Indian Institute of Technology Delhi - Central Library||Available|
"Version: 20170901"--Title page verso.
"A Morgan & Claypool publication as part of IOP Concise Physics"--Title page verso.
Includes bibliographical references.
Preface -- 1. Introduction to digital logic -- 1.1. Basic definitions of digital concepts -- 1.2. Digital and Boolean logic and its representation -- 1.3. Basic Boolean logic rules : application and examples -- 1.4. Interchangeability of gates and De Morgan's theorem -- 1.5. Implementing digital logic -- 1.6. Tri-state logic -- 1.7. Boolean logic expression summary -- 1.8. Exercises
2. FPGA and VERILOG : combinational logic I -- 2.1. Introduction to digital hardware -- 2.2. Application specific standard parts (ASSP) : 74XX digital logic chips -- 2.3. Introduction to the Vivado design environment and the BASYS3 boards -- 2.4. Introduction to Verilog : wires, vectors, buses and Verilog operators -- 2.5. Instantiating modules
3. FPGA and VERILOG : combinational logic part II -- 3.1. Binary number representation and Boolean mathematics -- 3.2. Boolean algebra and adder circuits -- 3.3. Multiplexers (MUX)/demultiplexers (DEMUX)
4. FPGA and VERILOG part II : sequential logic -- 4.1. Sequential logic : latches -- 4.2. Sequential logic : flip-flops -- 4.3. Sequential logic : fundamental counters -- 4.4. Sequential logic : counters with logic conditions -- 4.5. Pulse width modulation (PWM) -- 4.6. An audio player with PWM
5. Counters -- 5.1. Introduction -- 5.2. One-shot or monostable multivibrator and synchronizer and Vivado's behavior simulation tool -- 5.3. State machine frequency counter -- 5.4. Period counter -- 5.5. Computer interfacing the design by embedding a microprocessor.
Applied Digital Logic Exercises Using FPGAs is appropriate for anyone interested in digital logic who needs to learn how to implement it through detailed exercises with state-of-the-art digital design tools and components. The book exposes readers to combinational and sequential digital logic concepts and implements them with hands-on exercises using the Verilog Hardware Description Language (HDL) and a Field Programmable Gate Arrays (FGPA) teaching board.
Also available in print.
Mode of access: World Wide Web.
System requirements: Adobe Acrobat Reader, EPUB reader, or Kindle reader.
Kurt Wick received his MS in 1989 from the University of Minnesota where he has been developing and teaching, as Senior Scientist, the methods of experimental physics advanced laboratory course. The course covers a wide range of fields, such as optics, solid state and high energy physics and exposes students to electronics, programing and computer interfacing, statistics and data analysis. With his background in computers and electronics he is interested in teaching the fundamentals of digital electronics and how it pertains to today's consumer electronics and lab instruments. For the last five years, he has presented workshops on FPGAs through the Advanced Laboratory in Physics Association and when he's not working, he enjoys paddling in the woods of northern Minnesota and Ontario.
Title from PDF title page (viewed on October 26, 2017).