000 06173nam a2200745 i 4500
001 6812942
003 IEEE
005 20220822104806.0
006 m eo d
007 cr cn |||m|||a
008 101012s2010 caua foab 000 0 eng d
020 _a9781608452606 (electronic bk.)
020 _z9781608452590 (pbk.)
024 7 _a10.2200/S00245ED1V01Y201009COM005
_2doi
035 _a(CaBNVSL)gtp00544193
035 _a(OCoLC)707877278
040 _aCaBNVSL
_cCaBNVSL
_dCaBNVSL
050 4 _aTK7872.P38
_bT723 2010
082 0 4 _a621.3815364
_222
100 1 _aTranter, William H.
245 1 0 _aBasic simulation models of phase tracking devices using MATLAB
_h[electronic resource] /
_cWilliam Tranter, Ratchaneekorn Thamvichai, Tamal Bose.
260 _aSan Rafael, Calif. (1537 Fourth Street, San Rafael, CA 94901 USA) :
_bMorgan & Claypool,
_cc2010.
300 _a1 electronic text (xiv, 122 p. : ill.) :
_bdigital file.
490 1 _aSynthesis lectures on communications,
_x1932-1708 ;
_v# 5
538 _aMode of access: World Wide Web.
538 _aSystem requirements: Adobe Acrobat Reader.
500 _aPart of: Synthesis digital library of engineering and computer science.
500 _aSeries from website.
504 _aIncludes bibliographical references (p. 119-120).
505 0 _a1. Introduction -- Outline of the book -- A word of warning -- Origins of this synthesis lecture and a reference --
505 0 _a2. Basic PLL theory -- Basic phase-lock loop concepts -- Basic PLL model -- Nonlinear PLL phase model -- PLL linear phase model -- PLL order and loop filters -- Steady-state phase errors -- Acquisition and phase plane analysis -- First-order PLL -- The perfect second-order phase lock loop -- The imperfect second-order phase lock loop -- The perfect third-order phase lock loop -- Transport delay in phase-lock loops -- Problems --
505 0 _a3. Structures developed from the basic PLL -- The Costas phase-locked loop -- The QPSK loop -- The N-phase tracking loop -- Problems --
505 0 _a4. Simulation models -- Basic models for phase-locked loops -- The simulation model for the Costas PLL -- The QPSK loop -- The N-phase tracking loop -- Error sources in simulation -- Problems --
505 0 _a5. MATLAB simulations -- Simulation structure -- Assumed loop inputs -- MATLAB and SIMULINK simulations -- Second-order PLL demonstrations -- QPSK loop -- The N-phase tracking loop -- Problems --
505 0 _a6. Noise performance analysis -- PLL with additive noise -- Linear analysis -- Noise bandwidth -- Signal to noise ratio of the loop -- Nonlinear analysis -- PLL with VCO phase noise -- Linear analysis of VCO phase noise -- Simulation of 1st-order PLL with additive noise -- Simulation model -- Simulation results -- Problems --
505 0 _aA. Complex envelope and phase detector models -- A.1. Complex envelope -- A.2. Phase detector realizations --
505 0 _aB. Loop filter implementations -- B.1. Trapezoidal integration -- B.2. The loop filter for the perfect second-order phase-locked loop -- B.3. The loop filter for the imperfect second-order phase-locked loop -- B.4. The perfect third-order loop filter --
505 0 _aC. SIMULINK examples -- C.1. The perfect second-order PLL -- C.2. The perfect second-order PLL with transport delay -- C.3. The perfect third-order PLL -- C.4. Comments --
505 0 _aD. MATLAB and SIMULINK files -- D.1. MATLAB files -- D.2. SIMULINK files --
505 0 _aBibliography -- Authors' biographies.
506 1 _aAbstract freely available; full-text restricted to subscribers or individual document purchasers.
510 0 _aCompendex
510 0 _aINSPEC
510 0 _aGoogle scholar
510 0 _aGoogle book search
520 3 _aThe Phase-Locked Loop (PLL), and many of the devices used for frequency and phase tracking, carrier and symbol synchronization, demodulation, and frequency synthesis, are fundamental building blocks in today's complex communications systems. It is therefore essential for both students and practicing communications engineers interested in the design and implementation of modern communication systems to understand and have insight into the behavior of these important and ubiquitous devices. Since the PLL behaves as a nonlinear device (at least during acquisition), computer simulation can be used to great advantage in gaining insight into the behavior of the PLL and the devices derived from the PLL. The purpose of this Synthesis Lecture is to provide basic theoretical analyses of the PLL and devices derived from the PLL and simulation models suitable for supplementing undergraduate and graduate courses in communications.The Synthesis Lecture is also suitable for self study by practicing engineers. A significant component of this book is a set of basic MATLAB-based simulations that illustrate the operating characteristics of PLL-based devices and enable the reader to investigate the impact of varying system parameters. Rather than providing a comprehensive treatment of the underlying theory of phase-locked loops, theoretical analyses are provided in sufficient detail in order to explain how simulations are developed. The references point to sources currently available that treat this subject in considerable technical depth and are suitable for additional study.
530 _aAlso available in print.
588 _aTitle from PDF t.p. (viewed on October 12, 2010).
630 0 0 _aMATLAB.
650 0 _aPhase-locked loops
_xMathematical models.
653 _aPLL
653 _aPLL simulation
653 _afrequency tracking
653 _aphase tracking
653 _asignal acquisition
653 _asignal tracking
653 _asynchronization
653 _adigital demodulation
653 _aCostas PLL
700 1 _aThamvichai, Ratchaneekorn.
700 1 _aBose, Tamal.
830 0 _aSynthesis digital library of engineering and computer science.
830 0 _aSynthesis lectures on communications,
_x1932-1708 ;
_v# 5.
856 4 2 _3Abstract with links to resource
_uhttp://ieeexplore.ieee.org/servlet/opac?bknumber=6812942
999 _c237788
_d237788